40 research outputs found

    Optimal power control in green wireless sensor networks with wireless energy harvesting, wake-up radio and transmission control

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    Wireless sensor networks (WSNs) are autonomous networks of spatially distributed sensor nodes which are capable of wirelessly communicating with each other in a multi-hop fashion. Among different metrics, network lifetime and utility and energy consumption in terms of carbon footprint are key parameters that determine the performance of such a network and entail a sophisticated design at different abstraction levels. In this paper, wireless energy harvesting (WEH), wake-up radio (WUR) scheme and error control coding (ECC) are investigated as enabling solutions to enhance the performance of WSNs while reducing its carbon footprint. Specifically, a utility-lifetime maximization problem incorporating WEH, WUR and ECC, is formulated and solved using distributed dual subgradient algorithm based on Lagrange multiplier method. It is discussed and verified through simulation results to show how the proposed solutions improve network utility, prolong the lifetime and pave the way for a greener WSN by reducing its carbon footprint

    Wireless energy harvesting for Internet of Things

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    Internet of Things (IoT) is an emerging computing concept that describes a structure in which everyday physical objects, each provided with unique identifiers, are connected to the Internet without requiring human interaction. Long-term and self-sustainable operation are key components for realization of such a complex network, and entail energy-aware devices that are potentially capable of harvesting their required energy from ambient sources. Among different energy harvesting methods such as vibration, light and thermal energy extraction, wireless energy harvesting (WEH) has proven to be one of the most promising solutions by virtue of its simplicity, ease of implementation and availability. In this article, we present an overview of enabling technologies for efficient WEH, analyze the life-time of WEH-enabled IoT devices, and briefly study the future trends in the design of efficient WEH systems and research challenges that lie ahead

    On the design of multirate filter banks by H¦0¦0 optimization

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    grantor: University of TorontoThe main topic of this thesis is M-channel maximally decimated filter banks, commonly called quadrature mirror filter (QMF) banks. These systems are linear periodically time varying (LPTV). The first result of this thesis is that for the general class of LPTV systems, the \ell\sb2-induced gain and RMS induced gain are equal, a known fact for linear time invariant systems. We advocate optimizing such gains for an error system as an effective design approach. For QMF banks, we show that this design method automatically suboptimizes traditional measures of distortion, namely, aliasing distortion, magnitude distortion, and phase distortion. We compare the QMF bank which is designed by the {\cal H}\sb{\infty} optimization technique with one of the standard QMF banks used in subband coding. Specifically, we show that marginal improvement in performance can be achieved if a priori knowledge about the class of input signals is incorporated in the design. This gives hope that {\cal H}\sb{\infty} optimization, a general purpose technique, will be beneficial in other signal processing systems.M.A.Sc

    A FULLY DIFFERENTIAL HIGH-SPEED LOW VOLTAGE DOUBLE-EDGE TRIGGERED FLIP-FLOP (DETFF)

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    In this paper, a high-speed double-edge-triggered flip-flop designed in 0.18μm CMOS technology is presented. Flip-flops, to a large extend, determine the speed of synchronous systems. The proposed flip-flop can operate with a clock rate as high as 12.5GHz, which translates to 25GB/s data rate. It samples the data on both edges of the clock. All signals are realized differentially. The differential output swing is 0.8V with a 1.8V power supply. The average power consumption is 7mW. A performance comparison between the proposed flip-flop and a single-edge triggered flip-flop realized in the same technology is also presented. Keywords: Flip-flop, CMOS latch, High-speed circuits, Differential signaling, Multiplexer

    Johnston Filters and Optimal SNR in Maximally Decimated Filter Banks

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    In the design of maximally decimated filter banks, conventional practice is to use Johnston filters at both the analysis and synthesis ends. This paper proposes a two-step procedure: First, select suitable Johnston filters for the analysis side for good coding of the input; then design the synthesis filters to optimize the signal to reconstructed noise ratio SNR. A detailed example shows that one can do somewhat better than Johnston filters at the synthesis end. 1 Introduction This paper concerns the maximally decimated filter bank in Figure 1. The analysis filters are typically frequency selective: H 0 lowpass and H 1 highpass. Such systems are used in subband coding and decoding of speech, images, and video for transmission and storage. Subband coders have been adopted in many new international coding standards [1]. Even though the analysis and synthesis filters are linear time-invariant (LTI), the overall system is in general a linear periodically time-varying (LPTV) system because..

    Optimization of Low Power RF Building Blocks with the Inversion Coeffecient

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